The present invention relates to a pulse-width modulating amplifier circuit and, more particularly, to an amplifier in which MOS FET's are used for the pulse amplifier for power-amplifying a pulse-width signal.
There are pulse-width modulating amplifiers (referred to as PWM amplifiers) which modulate a high frequency triangular-wave carrier signal with an analog signal, such as an audio signal, into a pulse-width signal and power-amplify the pulse-width signal, and which demodulate the amplified pulse-width signal by eliminating the carrier signal with a filter before it is applied to a load such as a speaker. Those amplifiers are very efficient in power amplification and thus they have come to be used in automobile audio devices.
In FIG. 1, which is an example of a conventional PWM amplifier, an input terminal 1 is provided for receiving an analog signal. The analog signal is applied to the inverted input terminal of a comparator 2, while to its non-inverted input terminal is applied the output signal from a high frequency (e.g., about 200 kHz) triangular-wave generator 3. Thus, this causes the carrier signal to be modulated with the analog signal into a pulse-width signal. After going through a drive amplifier 4, the pulse-width signal is amplified by a pulse amplifier (power amplifier) 5, consisting of power FET's of the N-channel MOS type, and thereafter is applied to a filter circuit consisting of a choke coil 6 and a condenser 7, wherein the carrier signal is eliminated. The audio output from the filter circuit drives a load, such as a speaker 9, connected to an output terminal 8.
As a known fact, in order to turn on a MOS FET it is necessary to apply to the gate thereof a voltage higher than the +B voltage which is applied to the drain thereof. Therefore, in such a configuration as above, where MOS FET's are used as the pulse amplifier 5, it is necessary for the drive amplifier 4 at the preceding stage to output a voltage higher than the +B voltage. However, with only the +B voltage, a drive voltage from the drive amplifier 4 becomes too low to drive the pulse amplifier 5 satisfactorily.
FIG. 2 shows an embodiment intended for solving this problem. In this embodiment FET's of the N-channel MOS type are connected in a push-pull configuration to form a pulse amplifier 12. Numeral 10 denotes the first complementary drive amplifier consisting of an NPN transistor Q.sub.1 and a PNP transistor Q.sub.2 and 11 denotes the second complementary drive amplifier consisting of an NPN transistor Q.sub.3 and a PNP transistor Q.sub.4. Outputs of the first and second drive amplifiers 10 and 11 are connected to gates of respective power FET's Q.sub.5 and Q.sub.6 composing the pulse amplifier 12.
A bootstrap circuit 13 consisting of a condenser C.sub.1 and a diode D.sub.1 is provided to give a bias to the preceding drive amplifier 10, which has a problem of a drive voltage shortage.
That is to say, the bootstrap circuit 13 is formed in such a way that the condenser C.sub.1 has its one end connected with the output terminal of the pulse amplifier 12, the other end connected with the power voltage supplying line of the first drive amplifier 10. The power voltage supplying line is connected to a power source +B through the diode D.sub.1.
Thus, the above-mentioned condenser C.sub.1 is impressed with a positive (+) voltage via the diode D.sub.1 as shown in the figure. Turning-on of the first power FET Q.sub.5 causes the output terminal of the pulse amplifier 12 to shift to a voltage approximately equal to the power source voltage +B, so that the collector of the transistor Q.sub.1 included in the first drive amplifier 10 is impressed with approximately twice the power source voltage +B. Therefore, in such a pulse amplifier consisting of N-channel MOS FET's, the problem of a drive voltage shortage in the drive amplifier can be prevented from occurring.
However, in the configuration as described above there still remains the following problem: In the case where the analog signal applied to the input terminal 1 in FIG. 1 is so large as to cause the modulation factor of pulse-width modulation in the comparator 2 to exceed 100%, the output of the comparator 2 does not become the pulse-width signal, but a DC signal having a positive maximum or negative maximum value. Accordingly, in the embodiment of FIG. 2, the output of the drive amplifiers 10 and 11 becomes a DC signal having a certain value. This means that the FET's Q.sub.5 and Q.sub.6 composing the pulse amplifier 12 remain on or off, that is, there appears no pulse signal at the output terminal of the pulse amplifier 12.
The condenser C.sub.1 performs charging and discharging within a period of the carrier signal applied to the comparator 2. If the capacitance of the condenser C.sub.1 is selected to be large, due to the charges stored in the condenser C.sub.1 the first drive amplifier 10 is kept supplied with the power voltage higher than the power source voltage +B, even with the modulation factor which exceeds 100% in a short period. However, if the capacitance C.sub.1 is too large, an excessive charging current is supplied to the condenser C.sub.1 from the pulse amplifier 12 in synchronism with the carrier signal, causing a distortion in the output of the pulse amplifier 12 which results in a distortion in the demodulated audio output signal. Therefore, the capacitance C.sub.1 should not have so large a value, and hence with the analog signal which would cause the modulation factor to exceed 100%, the pulse output of the pulse amplifier 12 is interrupted and the condenser C.sub.1 is discharged completely in a short time.
Consequently, the bootstrap circuit consisting of the condenser C.sub.1 and the diode D stops working, causing the PWM amplifier to be in the state of abnormal output.